Machine Learning Techniques for resource prediction in nanoelectronic circuit design

This master’s thesis is about the use of machine learning techniques in the field of nanoelectronic circuit design. It has been developed in collaboration with eSilicon Corporation, which is a company specialized in designing and producing Application-specific integrated circuit (ASIC). While specific integrated circuits require several resources to be designed. Most of them can be classified as expenses from non-recurring engineering. This includes all costs used only once related to the final product. For example, in our project, they mean computational resources, such as CPU usage and memory utilization, but also hours worked by specialized designers. All of them have tremendous costs, which can not be reused for future designs. The study done in this thesis inverts the current situation, gathering data from the design process to produce valuable information for upcoming designs. This information is related to time, memory and specific attributes of the design. In order to achieve this goal, some of the most successful and helpful machine learning algorithms are used. Their purpose is to predict key aspects of the design and its computation before any execution is done. For example, if a designer is aware of that the result of an execution in terms of leakage or area utilization, will not satisfy their expectations, then he would be able to decide whether it is worth or not the execution. This implies saving time and computational resources. These machine learning techniques are fed with data obtained from designs. This data, though, may present us certain drawbacks like missing values, unreliable data due to bugs, errors during the execution and a long list of possible sources of noise and incorrect data. Thus, it is important to preprocess all that information to obtain a trustworthy and stable source of data. The final outcome of this project can be seen as the combination of data preprocess and machine learning use. This applied to the field of nanoelectronic circuit design, to get predictions of: runtime, CPU time, RAM memory, leakage and area utilization. This can lead to an improvement in productivity by reducing the total cost of computational resources and time spend on them by designers.